1 ? fn9001.3 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2003. all rights reserved. all other trademarks mentioned are the property of their respective owners. is-1845asrh single event radiation hardened high speed, current mode pwm the is-1845asrh is designed to be used in switching power supplies operating in current-mode. the rising edge of the on-chip oscillator turns on the output. turn-off is controlled by the current sense comparator and occurs when the sensed current reaches a peak controlled by the error amplifier. constructed with intersil?s rad hard silicon gate (rsg) dielectrically isolated bicmos process, these devices are immune to single event latch- up and have been specifically designed to provide a high level of immunity to single event transients. all specified parameters are guaranteed and tested for 300krad(si) total dose performance. detailed electrical specifications for these devices are contained in smd 5962-01509. a ?hot-link? is provided on our website for downloading the smd. pinouts is7-1845asrh (cdip2-t8 sbdip) top view is9-1845asrh (flatpack) top view notes: 1. grounding the comp pin does not inhibit the output. the output may be inhibited by applying >1.2v to the isense pin. 2. this part should be operated with ct=3.3nf and rt=10k timing components only. features ? electrically screened to dscc smd # 5962-01509 ? qml qualified per mil-prf-38535 requirements ? radiation environment - total dose . . . . . . . . . . . . . . . . . . . . 300 krad(si) (max) - sel immune. . . . . . . . . . . . . . . . . dielectrically isolated - seu immune . . . . . . . . . . . . . . . . . . . . 35mev/mg/cm 2 - seu cross-section at 89mev/mg/cm 2 . . . . 5 x 10 -6 cm 2 ? low start-up current . . . . . . . . . . . . . . . . . . . 100 a (typ) ? fast propagation delay . . . . . . . . . . . . . . . . . . 80ns (typ) ? supply voltage range . . . . . . . . . . . . . . . . . . . 12v to 20v ? high output drive. . . . . . . . . . . . . . . . . . . . 1a (peak, typ) ? under voltage lockout. .8.8v start (typ), 8.2v stop (typ) applications ? current-mode switch ing power supplies ? control of high current fet drivers ? motor speed and direction control tm comp vfb isense rtct 1 2 3 4 8 7 6 5 vref vcc out gnd comp vfb nc nc nc isense rtct nc 3 4 5 6 7 8 9 217 16 15 14 13 12 11 10 vref vcc vc out nc gnd oscgnd nc nc 1 18 nc ordering information ordering number internal mkt. number temp. range ( o c) 5962f0150901vpc is7-1845asrh-q -50 to 125 5962f0150901qpc IS7-1845ASRH-8 -50 to 125 5962f0150901vxc is9-1845asrh-q -50 to 125 5962f0150901qxc is9-1845asrh-8 -50 to 125 is7-1845asrh/proto is1-1845asrh/proto -50 to 125 is9-1845asrh/proto is9-1845asrh/proto -50 to 125 data sheet october 2003
2 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality ce rtifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that da ta sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com die characteristics die dimensions 3090 m x 4080 m (121.6 mils x 159.0 mils) thickness: 483 m 25.4 m (19 mils 1 mil) interface materials glassivation type: phosphorus silicon glass (psg) thickness: 8.0ka 1.0ka top metallization type: alsicu thickness: 16.0ka 2ka substrate radiation hardened silicon gate, dielectric isolation backside finish silicon assembly related information substrate potential unbiased (di) additional information worst case current density <2.0 x 10 5 a/cm 2 transistor count 582 metallization mask layout is-1845asrh notes: 3. both the gnd pads must be bonded to ground. 4. the out double-sized bond pad must be double bonded for current sharing purposes. 5. the oscgnd double-sized bond pad must be double bonded to ground for current sharing purposes. vfb comp vref vc vcc out gnd gnd oscgnd rtct isense is-1845asrh
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